Power Issues Related To Branch Prediction

Report
Authors:Parikh, Dharmesh, Department of Computer ScienceUniversity of Virginia Skadron, Kevin, Department of Computer ScienceUniversity of Virginia Zhang, Yan, Department of Computer ScienceUniversity of Virginia Barcella, Marco, Department of Computer ScienceUniversity of Virginia Stan, Mircea, Department of Computer ScienceUniversity of Virginia
Abstract:

This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy consumption in the processor it is worthwhile to spend more power in the branch predictor if this results in more accurate predictions that improve running time. Two techniques, however, provide substantial reductions in power dissipation without harming accuracy. Banking reduces the portion of the branch predictor that is active at any one time. And a new on-chip structure, the prediction probe detector (PPD), can use pre-decode bits to entirely eliminate unnecessary predictor and BTB accesses. Despite the extra power that must be spent accessing the PPD, it reduces local predictor power and energy dissipation by about 45% and overall processor power and energy dissipation by 5--6%.

Rights:
All rights reserved (no additional license for public reuse)
Language:
English
Source Citation:

Parikh, Dharmesh, Kevin Skadron, Yan Zhang, Marco Barcella, and Mircea Stan. "Power Issues Related To Branch Prediction." University of Virginia Dept. of Computer Science Tech Report (2001).

Publisher:
University of Virginia, Department of Computer Science
Published Date:
2001