Three-Dimensional Field-Programmable Gate ArraysReport
Motivated by improving FPGA performance, we propose a new three-dimensional (3D) FPGA architecture, along with afabrication methodology. We analgze the expected manufacturing yield, and raise several phgsical-design issues in the new 3D paradigm. Our techniques also have good implications for resource utilization, physical size, and power consumption.
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Alexander, M, J Cohoon, J Colflesh, J Karro, and G Robins. "Three-Dimensional Field-Programmable Gate Arrays." University of Virginia Dept. of Computer Science Tech Report (1995).
University of Virginia, Department of Computer Science