Evaluation of Dynamic Access Ordering HardwareReport
Memory bandwidth is rapidly becoming the limiting performance factor for many applica- tions, particularly for streaming computations - such as scientific vector processing or mul- timedia (de)compression - that lack the locality of reference that makes caching effective. We describe and evaluate a system that addresses the memory bandwidth problem for this class of computations by dynamically reordering stream accesses to exploit memory system architecture and device features. The technique is practical to implement, using existing compiler technology and requiring only a modest amount of special-purpose hardware. With our prototype system, we have observed performance improvements by over 200% over normal caching.
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McKee, S, C Oliver, Wm Wulf, K Wright, and J Aylor. "Evaluation of Dynamic Access Ordering Hardware." University of Virginia Dept. of Computer Science Tech Report (1995).
University of Virginia, Department of Computer Science