Fault-Tolerant, Real-time Reconfigurable Prefix Adder

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Authors:Guevara, Marisabel, Department of Computer ScienceUniversity of Virginia Gregg, Chris, Department of Computer ScienceUniversity of Virginia
Abstract:

In this paper, we assimilate and integrate two recent developments in prefix adder design and theory to create a fault-tolerant, real-time reconfigurable prefix adder. By exploiting the inherent redundancy of a Kogge-Stone adder we are able to extract signals to detect and correct from a single-fault. Our 16-bit design consumes less than 44% the hardware overhead of a comparable triple modular redun- dancy (TMR) 16-bit Kogge-Stone adder, and has a delay overhead of 33% to a standard Kogge-Stone adder. Higher bit-count adders will incur smaller delay cost. When a single fault (either a hard or soft error) is detected, the adder reconfigures itself to calculate the correct output. In the case of a non-recurring soft error, the adder will subsequently select the output of the Kogge-Stone adder, and in the event of a hard error, the adder will continue to reconfigure itself upon each successive addition to ensure proper output.

Rights:
All rights reserved (no additional license for public reuse)
Language:
English
Source Citation:

Guevara, Marisabel, and Chris Gregg. "Fault-Tolerant, Real-time Reconfigurable Prefix Adder." University of Virginia Dept. of Computer Science Tech Report (2009).

Publisher:
University of Virginia, Department of Computer Science
Published Date:
2009