Making Parallel Simulations Go Fast

Authors:Reynolds, Jr, Department of Computer ScienceUniversity of Virginia Pancerella, Carmen, Department of Computer ScienceUniversity of Virginia Srinivasan, Sudhir, Department of Computer ScienceUniversity of Virginia

This paper describes the details of a hardware realization of a framework to support parallel discrete event simulation [Reyn92]. We first motivate the need for hardware to compute and disseminate critical synchronization information in all parallel simulations. We establish correctness criteria and functional requirements of the framework hardware. We then describe details of a completed prototype design which is expected to be operational Summer, 1992. Throughout this discussion, we show how our design goals of speed, scalability, adaptability, and generality have been met. Our framework offloads all parallel simulation synchronization overhead from host processors and the host communication network in a closely coupled network of high-speed computers.
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Reynolds, Jr, Carmen Pancerella, and Sudhir Srinivasan. "Making Parallel Simulations Go Fast." University of Virginia Dept. of Computer Science Tech Report (1992).

University of Virginia, Department of Computer Science
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